1. Field
The following description relates to interrupt processing, and additionally, to interrupt processing in a multiprocessor that includes a plurality of CPUs.
2. Description of the Related Art
Interrupt latency corresponds to a delay time that is spent on interrupt processing, and is an important factor that affects system performance. As an example, if interrupt latency is increased due to unexpected events in information communication devices that are expected to implement real-time properties, the response time may be proportionally increased. As a result, a signal may be blocked or an image may not be properly output on a display.
In addition, a multiprocessor that includes multiple central processing units (CPUs) that are currently being used in the information communication devices. Therefore, methods for efficiently processing an interrupt in the multiprocessor are actively being researched.
To process the interrupt more efficiently in a multiprocessor, an amount of interrupts are measured for each CPU at the time of processing interrupt. In doing so, a balance of an interrupt occurrence rate can be maintained. However, the above method of measuring the amount of interrupts takes into consideration only a system status before the interrupt occurs not a system status at the time of the occurrence of the interrupt. Accordingly, this method is not efficient for the recent information communication devices in which various types of interrupts take place due to interaction with a user and internal operation of the device.
Moreover, if an interrupt occurs while another interrupt is being processed by a particular CPU, the newly occurring interrupt may stop the previously executed interrupt. Accordingly, latency of the stopped interrupt may be delayed until the processing of the new interrupt is completed.